Automatic test-pattern generation (ATPG) has played a key role in semiconductor logic test, but several trends driving the need for semiconductor test quality are challenging traditional ATPG tools.

In trading on Wednesday, shares of ATP Oil & Gas Corp (NASD: ATPG) entered into oversold territory, changing hands as low as $6.08 per share. We define oversold territory using the Relative Strength ...

WILSONVILLE, Ore., May 18, 2015 -- Mentor Graphics Corp. (NASDAQ: MENT) today announced that Mellanox Technologies has standardized on the new Mentor® Tessent® Hierarchical ATPG solution to manage the ...

Moore’s law has been the standard reference for semiconductor scaling. It roughly says that semiconductor design sizes, fueled by technology improvements, double every two years. Consequentially, the ...

Advanced ATPG products support simultaneous analysis of multiple fault models, leverage multi-threading and on-chip compression to improve quality and reduce turnaround time and costs of nanometer ICs ...

As semiconductor devices advance in complexity and sensitivity to power fluctuations, the integration of power-aware automatic test pattern generation (ATPG) is becoming indispensable for yield and ...

Design for Test (DFT) is a name for design techniques that add certain testability features to a microelectronic hardware product design. The premise of the added features is that they make it easier ...

Low-power design and fast testing at the fab are not happy bedfellows. As Giri Podichetty of Mentor Graphics explains at Semiwiki and in a white paper, “the goal of automatic test pattern generation ...

Watch the video below, where Lee Harrison – Director of Automotive IC Solutions at Siemens EDA – explains the technology behind full In-System ATPG testing for advanced semiconductors Continuous ...

Make all clocks and asynchronous resets come from chip pins during scan mode. Ensure that all scan elements on a scan chain are in the same clock domain. Know the requirements and limitations of your ...

The trend in semiconductors leads to more IC test data volume, longer test times, and higher test costs. Embedded deterministic test (EDT) has continued to deliver more compression, which has been ...